Verification of AHB-Lite Decoder

This course is designed to provide a solid foundation in the functional verification of an AHB-Lite Decoder, a key component in AMBA-based SoCs used to decode addresses and route AHB transactions to multiple slave peripherals. The focus is on understanding both the AHB-Lite protocol and building a SystemVerilog UVM-based verification environment for the decoder. Participants will begin with a detailed study of the AMBA AHB-Lite protocol, including signal definitions, transaction types, bus arbitration, and timing behavior. The course then moves to the design and functional role of an AHB-Lite decoder, which selects target slaves based on address decoding logic. Participants will build a UVM testbench for the AHB-Lite decoder, including a master agent, a multi-slave setup, and a coverage-driven verification environment. The training will emphasize writing directed and randomized testcases, functional coverage, assertions, and using waveform debugging tools to ensure complete verification.