Verification of AMBA Bridge - AXI2AHB

This course is designed to equip learners with the skills and knowledge required to verify an AXI to AHB Bridge, a critical IP used in SoCs to enable communication between high-performance AXI masters and legacy AHB-based subsystems. The focus is on functional verification using SystemVerilog and UVM, with an emphasis on protocol compliance, data integrity, and performance validation. Participants will explore the AXI and AHB protocol architectures, including their handshaking, data transfer mechanisms, and transaction types. The course then dives into the design intent and functional behavior of the AXI2AHB bridge, detailing how AXI transactions are converted to AHB-compliant ones. A complete UVM-based verification environment will be developed, including stimulus generation, monitors, checkers, scoreboards, functional coverage, and assertion-based verification. Students will also gain hands-on experience in writing reusable and scalable testbenches, debugging with waveforms, and analyzing coverage metrics for verification closure.